Invention Grant
US09209258B2 Depositing an etch stop layer before a dummy cap layer to improve gate performance
有权
在虚拟盖层之前沉积蚀刻停止层以提高栅极性能
- Patent Title: Depositing an etch stop layer before a dummy cap layer to improve gate performance
- Patent Title (中): 在虚拟盖层之前沉积蚀刻停止层以提高栅极性能
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Application No.: US14195330Application Date: 2014-03-03
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Publication No.: US09209258B2Publication Date: 2015-12-08
- Inventor: Feng Zhou , Tien-Ying Luo , Haiting Wang , Padmaja Nagaiah , Jean-Baptiste Laloe , Isabelle Pauline Ferain , Yong Meng Lee
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES INC.
- Current Assignee: GLOBALFOUNDRIES INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Heslin Rothenberg Farley & Mesit P.C.
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L29/78 ; H01L29/40 ; H01L29/51 ; H01L21/311
Abstract:
An improved method for fabricating a semiconductor device is provided. The method includes: depositing a dielectric layer on a substrate; depositing a first cap layer on the dielectric layer; depositing an etch stop layer on the dielectric layer; and depositing a dummy cap layer on the etch stop layer to form a partial gate structure. Also provided is a partially formed semiconductor device. The partially formed semiconductor device includes: a substrate; a dielectric layer on the substrate; a first cap layer on the dielectric layer; an etch stop layer on the dielectric layer; and a dummy cap layer on the etch stop layer forming a partial gate structure.
Public/Granted literature
- US20150249136A1 DEPOSITING AN ETCH STOP LAYER BEFORE A DUMMY CAP LAYER TO IMPROVE GATE PERFORMANCE Public/Granted day:2015-09-03
Information query
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