An apparatus for coding video data using a single-loop decoding approach may include a memory unit and a processor in communication with the memory unit. In an example, the memory unit stores the video data, the video data including a base layer and an enhancement layer. The base layer includes a base layer block, a non-constrained INTRA mode block, and an INTER mode block. The base layer block includes a sub-block located at least partially within one of the non-constrained INTRA mode block or the INTER mode block. The enhancement layer includes an enhancement layer block located at a position in the enhancement layer corresponding to a position of the base layer block in the base layer. The processor approximates pixel values of the sub-block and determines, based at least in part on the approximated pixel values, pixel values of the enhancement layer block.