Invention Grant
US09222785B2 Systems and methods of reducing timing measurement error due to clock offset
有权
降低由于时钟偏移引起的定时测量误差的系统和方法
- Patent Title: Systems and methods of reducing timing measurement error due to clock offset
- Patent Title (中): 降低由于时钟偏移引起的定时测量误差的系统和方法
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Application No.: US13926314Application Date: 2013-06-25
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Publication No.: US09222785B2Publication Date: 2015-12-29
- Inventor: Leor Banin , Yuval Amizur , Uri Schatzberg , Adrian P Stephens
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman Lundberg & Woessner, P.A.
- Main IPC: G05D1/02
- IPC: G05D1/02 ; G06F17/10 ; G06G7/78 ; G01C21/20 ; G01S5/02 ; G01S5/14

Abstract:
Navigation systems for use in indoor environments may include a navigation system that can calculate a time of flight of signals between a navigation device and a WiFi® Access Point. Such a calculation can be more accurate not just by using more accurate oscillators in devices, but by correcting a relative error between two devices. This relative error may be found by determining a timing offset correction, a difference in accuracy between the navigation device and the WiFi® Access Point. This may be performed by performing a fine frequency estimation on a long training field or by receiving a parts per million (ppm) offset from another device. Once the ppm offset is determined, the accuracy of the navigation device can be improved by a factor of 50 using a series of equations described in the disclosure.
Public/Granted literature
- US20140136093A1 SYSTEMS AND METHODS OF REDUCING TIMING MEASUREMENT ERROR DUE TO CLOCK OFFSET Public/Granted day:2014-05-15
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