发明授权
- 专利标题: Bias to detect and prevent short circuits in three-dimensional memory device
- 专利标题(中): 用于检测和防止三维存储器件短路的偏差
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申请号: US14451223申请日: 2014-08-04
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公开(公告)号: US09236131B1公开(公告)日: 2016-01-12
- 发明人: Jiahui Yuan , Jayavel Pachamuthu , Yingda Dong , Wei Zhao
- 申请人: SanDisk Technologies Inc.
- 申请人地址: US TX Plano
- 专利权人: SanDisk Technologies Inc.
- 当前专利权人: SanDisk Technologies Inc.
- 当前专利权人地址: US TX Plano
- 代理机构: Vierra Magen Marcus LLP
- 主分类号: G11C16/04
- IPC分类号: G11C16/04 ; G11C16/10 ; G11C16/26 ; H01L21/822
摘要:
In a three-dimensional stacked non-volatile memory device, a short circuit in a select gate layer is detected and prevented. A short circuit may occur when charges which are accumulated in select gate lines due to plasma etching, discharge through a remaining portion of the select gate layer in a short circuit path when the select gate lines are driven. To detect a short circuit, during a testing phase, an increasing bias is applied is applied to the remaining portion while a current is measured. An increase in the current above a threshold indicates that the bias has exceed a breakdown voltage of a short circuit path. A value of the bias at this time is recorded as an optimal bias. During subsequent operations involving select gate transistors or memory cells, such as programming, erasing or reading, the optimal bias is applied when the select gate lines are driven to prevent a current flow through the short circuit.
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