- 专利标题： Semiconductor memory device and method for manufacturing same
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申请号： US14464223申请日： 2014-08-20
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公开(公告)号： US09236395B1公开(公告)日： 2016-01-12
- 发明人: Toshiyuki Sasaki
- 申请人： KABUSHIKI KAISHA TOSHIBA
- 申请人地址： JP Tokyo
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JP Tokyo
- 代理机构： Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- 主分类号： H01L21/8242
- IPC分类号： H01L21/8242 ; H01L27/115 ; H01L29/10 ; H01L29/792
摘要：
According to one embodiment, the stacked body includes a plurality of stacked units and a first intermediate layer. Each of the stacked units includes a plurality of electrode layers and a plurality of insulating layers. Each of the insulating layers is provided between the electrode layers. The first intermediate layer is provided between the stacked units. The first intermediate layer is made of a material different from the electrode layers and the insulating layers. The plurality of columnar portions includes a channel body extending in a stacking direction of the stacked body to pierce the stacked body, and a charge storage film provided between the channel body and the electrode layers.
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