Invention Grant
US09242852B2 Wafer-level passivation structure of micro-device, micro-device including the same, and methods of manufacturing wafer-level passivation structure and micro-device
有权
微器件的晶圆级钝化结构，包括微晶元件的晶体级钝化结构以及晶圆级钝化结构和微器件的制造方法
- Patent Title: Wafer-level passivation structure of micro-device, micro-device including the same, and methods of manufacturing wafer-level passivation structure and micro-device
- Patent Title (中): 微器件的晶圆级钝化结构，包括微晶元件的晶体级钝化结构以及晶圆级钝化结构和微器件的制造方法
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Application No.: US13562968Application Date: 2012-07-31
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Publication No.: US09242852B2Publication Date: 2016-01-26
- Inventor: Jeong-yub Lee
- Applicant: Jeong-yub Lee
- Applicant Address: KR Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2011-0085320 20110825
- Main IPC: B81B7/02
- IPC: B81B7/02 ; B81C1/00 ; G02B3/12 ; G02B26/08
Abstract:
A wafer-level passivation structure of a micro-device, a micro-device including the same, and methods of manufacturing the wafer-level passivation structure and the micro-device may be provided. In particular, the passivation structure may include a spacer that is disposed on a substrate, covers a portion of the first surface, and has an elastic property, and an anti-adhesion layer that is disposed on a surface of the substrate between the spacer. The spacer may form a lattice pattern. The spacer may be formed of a silicon. The anti-adhesion layer may be a metallic film, an oxide film, or a nitride film.
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