Invention Grant
- Patent Title: Insulated gate type semiconductor device and method for fabricating the same
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Application No.: US14143196Application Date: 2013-12-30
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Publication No.: US09246000B2Publication Date: 2016-01-26
- Inventor: Hiroshi Inagawa , Nobuo Machida , Kentaro Oishi
- Applicant: Renesas Electronics Corporation , Renesas Eastern Japan Semiconductor, Inc.
- Applicant Address: JP Tokyo JP Tokyo
- Assignee: Renesas Electronics Corporation,Renesas Eastern Japan Semiconductor, Inc.
- Current Assignee: Renesas Electronics Corporation,Renesas Eastern Japan Semiconductor, Inc.
- Current Assignee Address: JP Tokyo JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2001-042352 20010219
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/66 ; H01L29/739 ; H01L29/06 ; H01L29/417
Abstract:
In an insulated-gate type semiconductor device in which a gate-purpose conductive layer is embedded into a trench which is formed in a semiconductor substrate, and a source-purpose conductive layer is provided on a major surface of the semiconductor substrate, a portion of a gate pillar which is constituted by both the gate-purpose conductive layer and a cap insulating film for capping an upper surface of the gate-purpose conductive layer is projected from the major surface of the semiconductor substrate; a side wall spacer is provided on a side wall of the projected portion of the gate pillar; and the source-purpose conductive layer is connected to a contact region of the major surface of the semiconductor substrate, which is defined by the side wall spacer.
Public/Granted literature
- US20140110780A1 INSULATED GATE TYPE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2014-04-24
Information query
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