A thin film transistor array panel includes a first insulating substrate, a gate electrode positioned on the first insulating substrate, a gate insulating layer positioned on the gate electrode, a semiconductor layer positioned on the gate insulating layer, and a source electrode and a drain electrode positioned on the semiconductor layer and spaced apart from each other, in which the semiconductor layer includes three or more amorphous silicon layers having different bandgap energies from one another in order to reduce a leakage current and improve performance of a liquid crystal display.