One exemplary embodiment provides a method of making an integrated circuit. The method includes forming a dummy gate structure above a semiconductor substrate, etching an exposed semiconductor substrate outside the dummy gate structure, depositing silicon oxide over the dummy gate structure and the semiconductor substrate to form a silicon oxide layer, etching source and drain contact vias through the silicon oxide layer, implanting source and drain dopants through the source and drain contact vias, removing the dummy gate structure, forming a final gate structure, etching substantially all of the silicon oxide layer, and depositing an ultra low K dielectric to form an ultra low K dielectric layer.