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US09257641B2 Via structure, memory array structure, three-dimensional resistance memory and method of forming the same 有权
通孔结构，存储阵列结构，三维电阻记忆及其形成方法

Via structure, memory array structure, three-dimensional resistance memory and method of forming the same
Abstract:
Provided is a three-dimensional resistance memory including a stack of layers. The stack of layers is encapsulated in a dielectric layer and is adjacent to at least one opening in the encapsulating dielectric layer. At least one L-shaped variable resistance spacer is disposed on at least a portion of the sidewall of the opening adjacent to the stack of layers. An electrode layer fills the remaining portion of the opening.
Abstract(Chinese):

提供了包括层叠层的三维电阻存储器。 层叠层被封装在电介质层中，并且与封装介电层中的至少一个开口相邻。 至少一个L形可变电阻间隔件设置在邻近层叠层的开口的侧壁的至少一部分上。 电极层填充开口的剩余部分。

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