Invention Grant
- Patent Title: Hierarchical programming of dual-stack switches in a network environment
- Patent Title (中): 网络环境中双栈交换机的分层编程
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Application No.: US14276628Application Date: 2014-05-13
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Publication No.: US09258255B2Publication Date: 2016-02-09
- Inventor: Ayan Banerjee , Ramesh V. N. Ponnapalli
- Applicant: CISCO TECHNOLOGY, INC.
- Applicant Address: US CA San Jose
- Assignee: CISCO TECHNOLOGY, INC.
- Current Assignee: CISCO TECHNOLOGY, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patent Capital Group
- Main IPC: H04L12/931
- IPC: H04L12/931 ; H04L29/12

Abstract:
An example method for hierarchical programming of dual-stack switches in a network environment is provided and includes receiving packets from the network at a line card in the modular switch, a first portion of the packets being destined to Internet Protocol version 6 (IPv6) destination IP (DIP) addresses and a second portion of the packets being destined to IPv4 DIP addresses, and performing hierarchical lookups of the IPv6 DIP addresses and the IPv4 DIP addresses. Layer 3 (L3) lookups for the IPv6 DIP addresses are performed at the line card, and L3 lookups for IPv4 DIP addresses are performed at a fabric module in the modular switch. The line card and the fabric module are interconnected inside a chassis of the modular switch. In specific embodiments, the method further comprises inspecting the packets' destination Media Access Control (DMAC) addresses comprising router MAC addresses indicative of IPv6 or IPv4 address families.
Public/Granted literature
- US20150295862A1 HIERARCHICAL PROGRAMMING OF DUAL-STACK SWITCHES IN A NETWORK ENVIRONMENT Public/Granted day:2015-10-15
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