发明授权
US09262340B1 Privileged mode methods and circuits for processor systems 有权
处理器系统的特权模式方法和电路

Privileged mode methods and circuits for processor systems
摘要:
A system can include a processor coupled to a bus; a first memory coupled to the bus, configured to limit access to a privileged portion according to at least protection values; a second memory coupled to the bus and having a privileged supervisory portion configured to be section erasable, access to the second memory being limited according to at least the protection values; and a boot sequence stored in the privileged portion that configures the processor to decode values stored in the supervisory portion into the protection values for storage in protection value registers.
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