Invention Grant
US09262362B2 Multi-cycle delay for communication buses 有权
通讯总线多循环延时

Multi-cycle delay for communication buses
Abstract:
A system is disclosed that may compensate for bus timing that may vary over operating conditions of a bus. The system may include a communication bus, a first functional unit configured to transmit data via the communication bus, and a second functional unit configured to receive data via the bus. The first functional unit may transmit a first value via the communication bus to the second functional unit. The first functional unit may be further configured to assert a data valid signal responsive to a determination that a first time period has elapsed since the transmission of the first data value. The second functional unit may be configured to receive the first data value and sample the first data value dependent upon the data valid signal.
Public/Granted literature
Information query
Patent Agency Ranking
0/0