Invention Grant
- Patent Title: Method of manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US14079120Application Date: 2013-11-13
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Publication No.: US09263291B2Publication Date: 2016-02-16
- Inventor: Koichi Toba , Hiraku Chakihara , Yoshiyuki Kawashima , Kentaro Saito , Takashi Hashimoto
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kanagawa
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Kanagawa
- Agency: Young & Thompson
- Priority: JP2013-040061 20130228
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/3105 ; H01L27/092 ; H01L29/423 ; H01L29/66 ; H01L27/115 ; H01L21/8234

Abstract:
To improve a semiconductor device having a nonvolatile memory. a first MISFET, a second MISFET, and a memory cell are formed, and a stopper film made of a silicon oxide film is formed thereover. Then, over the stopper film, a stress application film made of a silicon nitride film is formed, and the stress application film over the second MISFET and the memory cell is removed. Thereafter, heat treatment is performed to apply a stress to the first MISFET. Thus, a SMT is not applied to each of elements, but is applied selectively. This can reduce the degree of degradation of the second MISFET due to H (hydrogen) in the silicon nitride film forming the stress application film. This can also reduce the degree of degradation of the characteristics of the memory cell due to the H (hydrogen) in the silicon nitride film forming the stress application film.
Public/Granted literature
- US20140242796A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2014-08-28
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