Invention Grant
US09263518B2 Component, for example NMOS transistor, with active region with relaxed compression stresses, and fabrication method
有权
元件，例如NMOS晶体管，具有松弛压缩应力的有源区，以及制造方法
- Patent Title: Component, for example NMOS transistor, with active region with relaxed compression stresses, and fabrication method
- Patent Title (中): 元件，例如NMOS晶体管，具有松弛压缩应力的有源区，以及制造方法
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Application No.: US14300663Application Date: 2014-06-10
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Publication No.: US09263518B2Publication Date: 2016-02-16
- Inventor: Christian Rivero , Guilhem Bouton , Pascal Fornara
- Applicant: STMicroelectronics (Rousset) SAS
- Applicant Address: FR Rousset
- Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee: STMicroelectronics (Rousset) SAS
- Current Assignee Address: FR Rousset
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1355476 20130613
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L27/06 ; H01L29/06 ; H01L21/762 ; H01L29/66 ; H01L29/08 ; H01L23/522
Abstract:
An integrated circuit includes a substrate and at least one NMOS transistor having, in the substrate, an active region surrounded by an insulating region. The insulating region is formed to includes at least one area in which the insulating region has two insulating extents that are mutually separated from each other by a separation region formed by a part of the substrate.
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