Invention Grant
- Patent Title: Low overhead paged memory runtime protection
- Patent Title (中): 低开销分页内存运行时保护
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Application No.: US13730920Application Date: 2012-12-29
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Publication No.: US09268707B2Publication Date: 2016-02-23
- Inventor: Ravi L. Sahita , Xiaoning Li , Manohar R. Castelino
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Alpine Technology Law Group LLC
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F12/10 ; G06F9/455 ; G06F12/14
Abstract:
Methods and apparatus relating to low overhead paged memory runtime protection are described. In an embodiment, permission information for guest physical mapping are received prior to utilization of paged memory by an Operating System (OS) based on the guest physical mapping. The permission information is provided through an Extended Page Table (EPT). Other embodiments are also described.
Public/Granted literature
- US20140189194A1 LOW OVERHEAD PAGED MEMORY RUNTIME PROTECTION Public/Granted day:2014-07-03
Information query
