Invention Grant
- Patent Title: Fabrication method of wafer level semiconductor package and fabrication method of wafer level packaging substrate
- Patent Title (中): 晶圆级半导体封装的制造方法及晶圆级封装衬底的制造方法
-
Application No.: US13628582Application Date: 2012-09-27
-
Publication No.: US09269602B2Publication Date: 2016-02-23
- Inventor: Lu-Yi Chen
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW101109611A 20120321
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/683 ; H01L21/48 ; H01L23/31 ; H01L23/498 ; H01L21/56 ; H01L23/00 ; H01L25/065 ; H01L21/66

Abstract:
A fabrication method of a wafer level semiconductor package includes: forming on a carrier a first dielectric layer having first openings exposing portions of the carrier; forming a circuit layer on the first dielectric layer, a portion of the circuit layer being formed in the first openings; forming on the first dielectric layer and the circuit layer a second dielectric layer having second openings exposing portions of the circuit layer; forming conductive bumps in the second openings; mounting a semiconductor component on the conductive bumps; forming an encapsulant for encapsulating the semiconductor component; and removing the carrier to expose the circuit layer. By detecting the yield rate of the circuit layer before mounting the semiconductor component, the invention avoids discarding good semiconductor components together with packages as occurs in the prior art, thereby saving the fabrication cost and improving the product yield.
Public/Granted literature
Information query
IPC分类: