Invention Grant
US09280510B2 Inter-chip communications with link layer interface and protocol adaptor
有权
与链路层接口和协议适配器的芯片间通信
- Patent Title: Inter-chip communications with link layer interface and protocol adaptor
- Patent Title (中): 与链路层接口和协议适配器的芯片间通信
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Application No.: US14600470Application Date: 2015-01-20
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Publication No.: US09280510B2Publication Date: 2016-03-08
- Inventor: Sridharan Ranganathan , David J. Harriman , Anoop Mukker , Satheesh Chellappan , Karthi R. Vadivelu , Shalini Sharma , Zeeshan Sarwar
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: International IP Law Group, P.L.L.C.
- Main IPC: G06F13/36
- IPC: G06F13/36 ; G06F13/42 ; G06F13/40
Abstract:
An interface for low power, high bandwidth communications between units in a device in provided herein. The interface comprises a USB 3.0 system interface and a SuperSpeed inter-chip (SSIC) protocol adaptor configured to facilitate communications between the USB 3.0 system interface and an M-PHY interface.
Public/Granted literature
- US20150134866A1 SUPERSPEED INTER-CHIP INTERFACE Public/Granted day:2015-05-14
Information query
