Invention Grant
- Patent Title: Designed-based interconnect structure in semiconductor structure
- Patent Title (中): 半导体结构中基于设计的互连结构
-
Application No.: US14476349Application Date: 2014-09-03
-
Publication No.: US09281273B1Publication Date: 2016-03-08
- Inventor: Chih-Liang Chen , Chih-Ming Lai , Yung-Sung Yen , Kam-Tou Sio , Tsong-Hua Ou , Chun-Kuang Chen , Ru-Gun Liu , Shu-Hui Sung , Charles Chew-Yuen Young
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Co., LTD.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., LTD.
- Current Assignee Address: TW Hsin-Chu
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Main IPC: H01L27/118
- IPC: H01L27/118 ; H01L23/528 ; H01L23/522

Abstract:
Semiconductor structures are provided. The semiconductor structure includes a plurality of gate structures extending in a first direction formed over a substrate and a contact formed adjacent to the gate structures over the substrate. The semiconductor structure further includes a plurality of metal layers formed over the gate structures. In addition, some of the metal layers include metal lines extending in the first direction, and some of the metal layers include metal lines extending in a second direction substantially perpendicular to the first direction. Furthermore, the gate structures follow the following equation: 0.2 P gate min + 0.35 L gate min + 0.3 H gate min - 20 0.2 L gate min + 0.8 H gate min - 5 × 0.3 L gate min + 0.3 H gate min + 5 38 ≤ 0.32 Pgate min is the minimum value among gate pitches of the gate structures. Lgate min is the minimum value among gate lengths of the gate structures. Hgate min is the minimum value among gate heights of the gate structures.
Public/Granted literature
- US20160064322A1 DESIGNED-BASED INTERCONNECT STRUCTURE IN SEMICONDUCTOR STRUCTURE Public/Granted day:2016-03-03
Information query
IPC分类: