An array substrate is disclosed. The array substrate includes a non-display region surrounding a display region. The array substrate also includes gate lines in the display region, and a gate drive circuit and a bus electrically insulated from the gate lines and a gate drive circuit in the non-display region. The gate lines extend into the non-display region and are electrically connected to the gate drive circuit, and each of the gate lines crosses the bus in a first overlap region. The array substrate also includes auxiliary electrode line segments between the bus and the display region. The auxiliary electrode line segments are electrically insulated from one another and from the gate lines, and the auxiliary electrode line segments are disposed in either of a same conductive layer as the bus, or a layer between the conductive layer of the bus and a conductive layer of the gate lines are disposed.