发明授权
US09286071B2 Instruction set architecture with opcode lookup using memory attribute
有权
指令集架构与操作码查找使用内存属性
- 专利标题: Instruction set architecture with opcode lookup using memory attribute
- 专利标题(中): 指令集架构与操作码查找使用内存属性
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申请号: US14839577申请日: 2015-08-28
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公开(公告)号: US09286071B2公开(公告)日: 2016-03-15
- 发明人: Adam J. Muff , Paul E. Schardt , Robert A. Shearer , Matthew R. Tubbs
- 申请人: International Business Machines Corporation
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Middleton Reutlinger
- 主分类号: G06F9/30
- IPC分类号: G06F9/30
摘要:
A method decodes instructions based in part on one or more decode-related attributes stored in a memory address translation data structure such as an Effective To Real Translation (ERAT) or Translation Lookaside Buffer (TLB). A memory address translation data structure may be accessed, for example, in connection with a decode of an instruction stored in a page of memory, such that one or more attributes associated with the page in the data structure may be used to control how that instruction is decoded.
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