发明授权
US09294120B2 Digital technique for excess loop delay compensation in a continuous-time delta sigma modulator 有权
用于连续时间ΔΣ调制器中多余环路延迟补偿的数字技术

Digital technique for excess loop delay compensation in a continuous-time delta sigma modulator
摘要:
A continuous time delta sigma modulator includes a quantizer, a buffer module, and a reference module. The quantizer includes a comparator that updates a digital output each cycle of a clock signal based on a comparison of a reference potential with an input generated based on a sample of an analog signal. The buffer module receives the digital output, stores the digital output for a predetermined delay period, and outputs the digital output after the predetermined delay period as a delayed digital output. The predetermined delay period is less than one cycle of the clock signal. The reference module selectively varies the reference potential based on the delayed digital output.
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