Invention Grant
US09298613B2 Integrated circuit for computing target entry address of buffer descriptor based on data block offset, method of operating same, and system including same
有权
用于基于数据块偏移计算缓冲器描述符的目标入口地址的集成电路，其操作方法和包括其的系统
- Patent Title: Integrated circuit for computing target entry address of buffer descriptor based on data block offset, method of operating same, and system including same
- Patent Title (中): 用于基于数据块偏移计算缓冲器描述符的目标入口地址的集成电路，其操作方法和包括其的系统
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Application No.: US14144682Application Date: 2013-12-31
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Publication No.: US09298613B2Publication Date: 2016-03-29
- Inventor: Seong Woon Kim , Kwan Ho Kim , Seok Min Kim , Tae Sun Kim
- Applicant: SAMSUNG ELECTRONICS CO., LTD.
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Agency: Sughrue Mion, PLLC
- Priority: KR10-2013-0022168 20130228
- Main IPC: G06F13/12
- IPC: G06F13/12 ; G06F13/38 ; G06F12/06 ; G06F12/02
Abstract:
A method of operating an integrated circuit is provided. The method includes receiving a data block offset from a second storage device, obtaining a target entry address using the data block offset, and reading an entry among a plurality of entries comprised in a buffer descriptor stored in a first storage device based on the target entry address. The method also includes reading data from a data buffer among a plurality of data buffers included in the first storage device using a physical address included in the entry and transmitting the data to the second storage device.
Public/Granted literature
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