Embodiments include multi-processor systems, including multi-core processor systems, as well as methods for operating the same, in which at least one processor or processor core is configured to receive an instruction directing the at least one processor core to read a value associated with a memory address. In response to receiving the instruction and before execution of the instruction, the at least one processor or processor core causes ones of the plurality of mutually communicatively inter-coupled processor cores to provide a plurality of locally stored values that are stored individually in the respective processor cores and that are associated with the memory address.