Invention Grant
- Patent Title: Timing scrambling method and timing control circuit thereof
- Patent Title (中): 定时加扰方法及其定时控制电路
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Application No.: US14010502Application Date: 2013-08-26
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Publication No.: US09299285B2Publication Date: 2016-03-29
- Inventor: Shun-Hsun Yang , Chia-Wei Su
- Applicant: NOVATEK Microelectronics Corp.
- Applicant Address: TW Hsinchu Science Park, Hsin-Chu
- Assignee: NOVATEK Microelectronics Corp.
- Current Assignee: NOVATEK Microelectronics Corp.
- Current Assignee Address: TW Hsinchu Science Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Priority: TW101146424A 20121210
- Main IPC: G09G3/36
- IPC: G09G3/36 ; G09G3/20
Abstract:
A timing scrambling method, for a timing control device corresponding to a plurality of source driving devices, includes adjusting a selecting signal according to a clock signal; selecting one of a plurality of scrambling generating units according to the selecting signal to generate a timing scrambling signal; and generating scrambling data for the plurality of source driving devices according to the timing scrambling signal.
Public/Granted literature
- US20140160183A1 TIMING SCRAMBLING METHOD AND TIMING CONTROL CIRCUIT THEREOF Public/Granted day:2014-06-12
Information query
IPC分类:
