发明授权
US09299890B2 III nitride semiconductor substrate, epitaxial substrate, and semiconductor device
有权
III族氮化物半导体衬底,外延衬底和半导体器件
- 专利标题: III nitride semiconductor substrate, epitaxial substrate, and semiconductor device
- 专利标题(中): III族氮化物半导体衬底,外延衬底和半导体器件
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申请号: US14579460申请日: 2014-12-22
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公开(公告)号: US09299890B2公开(公告)日: 2016-03-29
- 发明人: Keiji Ishibashi
- 申请人: SUMITOMO ELECTRIC INDUSTRIES, LTD.
- 申请人地址: JP Osaka-shi, Osaka
- 专利权人: SUMITOMO ELECTRIC INDUSTRIES, LTD.
- 当前专利权人: SUMITOMO ELECTRIC INDUSTRIES, LTD.
- 当前专利权人地址: JP Osaka-shi, Osaka
- 代理机构: Drinker Biddle & Reath LLP
- 优先权: JP2009-228598 20090930
- 主分类号: H01L29/20
- IPC分类号: H01L29/20 ; H01L33/30 ; C30B23/02 ; C30B25/18 ; C30B29/40 ; H01L21/02 ; H01L23/00 ; H01L21/306 ; H01L33/02 ; H01L33/16 ; H01L33/12 ; H01L33/32
摘要:
In a semiconductor device 100, it is possible to prevent C from piling up at a boundary face between an epitaxial layer 22 and a group III nitride semiconductor substrate 10 by the presence of 30×1010 pieces/cm2 to 2000×1010 pieces/cm2 of sulfide in terms of S and 2 at % to 20 at % of oxide in terms of O in a surface layer 12. By thus preventing C from piling up, a high-resistivity layer is prevented from being formed on the boundary face between the epitaxial layer 22 and the group III nitride semiconductor substrate 10. Accordingly, it is possible to reduce electrical resistance at the boundary face between the epitaxial layer 22 and the group III nitride semiconductor substrate 10, and improve the crystal quality of the epitaxial layer 22. Consequently, it is possible to improve the emission intensity and yield of the semiconductor device 100.
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