Invention Grant
- Patent Title: Integrated circuits with nanowires and methods of manufacturing the same
- Patent Title (中): 具有纳米线的集成电路及其制造方法
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Application No.: US14457934Application Date: 2014-08-12
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Publication No.: US09306019B2Publication Date: 2016-04-05
- Inventor: Jing Wan , Guillaume Bouche , Andy Wei , Shao Ming Koh
- Applicant: GLOBALFOUNDRIES, Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: H01L29/423
- IPC: H01L29/423 ; H01L29/66 ; H01L29/78

Abstract:
Integrated circuits and methods for producing the same are provided. A method for producing an integrated circuit includes forming a layered fin overlying a substrate, where the layered fin includes an SiGe layer and an Si layer. The SiGe layer and the Si layer alternate along a height of the layered fin. A dummy gate is formed overlying the substrate and the layered fin, and a source and a drain area formed in contact with the layered fin. The dummy gate is removed to expose the SiGe layer and the Si layer, and the Si layer is removed to produce an SiGe nanowire. A high K dielectric layer that encases the SiGe nanowire between the source and the drain is formed, and a replacement metal gate is formed so that the replacement metal gate encases the high K dielectric layer and the SiGe nanowire between the source and drain.
Public/Granted literature
- US20160049489A1 INTEGRATED CIRCUITS WITH NANOWIRES AND METHODS OF MANUFACTURING THE SAME Public/Granted day:2016-02-18
Information query
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