Invention Grant
US09306039B2 Method of making split-gate memory cell with substrate stressor region
有权
具有衬底应力区域的分裂栅极存储器单元的方法
- Patent Title: Method of making split-gate memory cell with substrate stressor region
- Patent Title (中): 具有衬底应力区域的分裂栅极存储器单元的方法
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Application No.: US14665079Application Date: 2015-03-23
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Publication No.: US09306039B2Publication Date: 2016-04-05
- Inventor: Mandana Tadayoni , Nhan Do
- Applicant: Silicon Storage Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP (US)
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L29/788 ; H01L29/423 ; H01L29/778 ; H01L21/28 ; H01L27/115 ; H01L29/78

Abstract:
A memory device, and method of make same, having a substrate of semiconductor material of a first conductivity type, first and second spaced-apart regions in the substrate of a second conductivity type, with a channel region in the substrate therebetween, a conductive floating gate over and insulated from the substrate, wherein the floating gate is disposed at least partially over the first region and a first portion of the channel region, a conductive second gate laterally adjacent to and insulated from the floating gate, wherein the second gate is disposed at least partially over and insulated from a second portion of the channel region, and a stressor region of embedded silicon carbide formed in the substrate underneath the second gate.
Public/Granted literature
- US20150200278A1 Method Of Making Split-Gate Memory Cell With Substrate Stressor Region Public/Granted day:2015-07-16
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