Invention Grant
- Patent Title: Cache memory system
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Application No.: US12284331Application Date: 2008-09-19
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Publication No.: US09311246B2Publication Date: 2016-04-12
- Inventor: Andrew Michael Jones , Stuart Ryan
- Applicant: Andrew Michael Jones , Stuart Ryan
- Applicant Address: GB Marlow Bucks
- Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
- Current Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
- Current Assignee Address: GB Marlow Bucks
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Priority: GB0722707.7 20071119
- Main IPC: G06F12/02
- IPC: G06F12/02 ; G06F12/08

Abstract:
Systems and methods are disclosed that comprise a cache memory for storing a copy of a portion of data stored in a system memory and a cache load circuit capable of retrieving the portion of data from the system memory. The systems and methods further comprise a status memory for identifying whether or not a region of the cache memory contains data that has been accessed from the cache memory by an external device.
Public/Granted literature
- US20090132768A1 Cache memory system Public/Granted day:2009-05-21
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