发明授权
US09312362B2 Manufacture of a variation resistant metal-oxide-semiconductor field effect transistor (MOSFET)
有权
制造耐变换金属氧化物半导体场效应晶体管(MOSFET)
- 专利标题: Manufacture of a variation resistant metal-oxide-semiconductor field effect transistor (MOSFET)
- 专利标题(中): 制造耐变换金属氧化物半导体场效应晶体管(MOSFET)
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申请号: US14664595申请日: 2015-03-20
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公开(公告)号: US09312362B2公开(公告)日: 2016-04-12
- 发明人: Asen Asenov , Gareth Roy
- 申请人: Gold Standard Simulations Ltd.
- 申请人地址: GB Glasgow, Scotland
- 专利权人: SemiWise Limited
- 当前专利权人: SemiWise Limited
- 当前专利权人地址: GB Glasgow, Scotland
- 代理机构: Blakely Sokoloff Taylor & Zafman LLP
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L29/66 ; H01L29/51 ; H01L29/78 ; H01L29/10 ; H01L21/02 ; H01L21/306 ; H01L21/3105 ; H01L21/311 ; H01L21/8234 ; H01L29/36
摘要:
Variation resistant metal-oxide-semiconductor field effect transistors (MOSFETs) are manufactured using a high-K, metal-gate ‘channel-last’ process. A cavity is formed between spacers formed over a well area having separate drain and source areas, and then a recess into the well area is formed. The active region is formed in the recess, comprising an optional narrow highly doped layer, essentially a buried epitaxial layer, over which a second un-doped or lightly doped layer is formed which is a channel epitaxial layer. The high doping beneath the low doped epitaxial layer can be achieved utilizing low-temperature epitaxial growth with single or multiple delta doping, or slab doping. A high-K dielectric stack is formed over the channel epitaxial layer, over which a metal gate is formed within the cavity boundaries. In one embodiment of the invention a cap of poly-silicon or amorphous silicon is added on top of the metal gate.
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