Invention Grant
- Patent Title: Method for operating small-area EEPROM array
- Patent Title (中): 操作小区域EEPROM阵列的方法
-
Application No.: US14572931Application Date: 2014-12-17
-
Publication No.: US09318208B1Publication Date: 2016-04-19
- Inventor: Hsin-Chang Lin , Wen-Chien Huang , Ya-Ting Fan , Yang-Sen Yeh , Cheng-Ying Wu
- Applicant: YIELD MICROELECTRONICS CORP.
- Applicant Address: TW Chu-Pei
- Assignee: Yield Microelectronics Corp.
- Current Assignee: Yield Microelectronics Corp.
- Current Assignee Address: TW Chu-Pei
- Agency: Rosenberg, Klein & Lee
- Main IPC: G11C16/14
- IPC: G11C16/14

Abstract:
A method for operating a small-area EEPROM array is disclosed. The small-area EEPROM array comprises bit lines, word lines, common source lines, and sub-memory arrays. The bit lines are divided into bit line groups. The word lines include a first word line. The common source lines include a first common source line. Each sub-memory array includes a first, second, third and fourth memory cells, which are connected with two bit line groups, a word line and a common source line. The first and second memory cells are symmetric. The third and fourth memory cells are symmetric. The group of the first and second memory cells and the group of the third and fourth memory cells are respectively positioned at two sides of the first common source line. The method operates all operation memory cells and uses special biases to program or erase memory cells massively in a single operation.
Information query