Invention Grant
- Patent Title: 3D atomic layer gate or junction extender
- Patent Title (中): 3D原子层门或连接扩展器
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Application No.: US14589022Application Date: 2015-01-05
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Publication No.: US09318318B1Publication Date: 2016-04-19
- Inventor: Kevin K. Chan , Pouya Hashemi , Effendi Leobandung , Dae-Gyu Park , Min Yang
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Steven F. McDaniel
- Main IPC: H01L21/22
- IPC: H01L21/22 ; H01L21/38 ; H01L23/48 ; H01L23/52 ; H01L29/40 ; H01L21/02 ; H01L29/66 ; H01L29/78 ; H01L29/417

Abstract:
A method for fabricating a semiconductor device includes receiving a gated finned substrate comprising an isolation layer with a semiconductor fin formed thereon and a gate formed over the semiconductor fin, depositing an atomic layer of dopant on a portion of the semiconductor fin that is laterally adjacent to the gate, forming a lateral spacer on a sidewall of the gate and above a gate extension portion of the atomic layer of dopant, and epitaxially growing a raised source or drain region on the semiconductor fin, that is laterally adjacent to the lateral spacer, from the atomic layer of dopant. The method may also include conducting a low temperature annealing process to diffuse the atomic layer of dopant to the raised source or drain region of the semiconductor fin. A corresponding apparatus is also disclosed herein.
Information query
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