发明授权
- 专利标题: Method of fabricating ultra-deep vias and three-dimensional integrated circuits using ultra-deep vias
- 专利标题(中): 使用超深通孔制造超深通孔和三维集成电路的方法
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申请号: US12540490申请日: 2009-08-13
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公开(公告)号: US09318375B2公开(公告)日: 2016-04-19
- 发明人: Douglas C. La Tulipe, Jr. , Mark Todhunter Robson
- 申请人: Douglas C. La Tulipe, Jr. , Mark Todhunter Robson
- 申请人地址: KY Grand Cayman
- 专利权人: GLOBALFOUNDRIES INC.
- 当前专利权人: GLOBALFOUNDRIES INC.
- 当前专利权人地址: KY Grand Cayman
- 代理机构: Thompson Hine LLP
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L21/768 ; H01L27/06
摘要:
A method of forming a high aspect ratio via opening through multiple dielectric layers, a high aspect ratio electrically conductive via, methods of forming three-dimension integrated circuits, and three-dimensional integrated circuits. The methods include forming a stack of at least four dielectric layers and etching the first and third dielectric layers with processes selective to the second and fourth dielectric layers, etching the second and third dielectric layers with processes selective to the first and second dielectric layers. Advantageously the process used to etch the third dielectric layer is not substantially selective to the first dielectric layer.
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