Invention Grant
- Patent Title: Method of forming gate dielectric layer and method of fabricating semiconductor device
- Patent Title (中): 形成栅介质层的方法和制造半导体器件的方法
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Application No.: US14165021Application Date: 2014-01-27
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Publication No.: US09318595B2Publication Date: 2016-04-19
- Inventor: Seung-Mi Lee , Yun-Hyuck Ji , Beom-Yong Kim , Bong-Seok Jeon
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2012-0027843 20120319
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/265 ; H01L29/66 ; H01L29/10 ; H01L29/49 ; H01L29/51 ; H01L21/8234 ; H01L21/8238
Abstract:
A method for fabricating a semiconductor device includes ion-implanting germanium into a monocrystalline silicon-containing substrate; forming a gate oxide layer over a surface of the monocrystalline silicon-containing substrate and forming, under the gate oxide layer, a germanium-rich region in which the germanium is concentrated, by performing a plasma oxidation process; and crystallizing the germanium-rich region by performing an annealing process.
Public/Granted literature
- US20140203337A1 METHOD OF FORMING GATE DIELECTRIC LAYER AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2014-07-24
Information query
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