Invention Grant
- Patent Title: Verification methods and systems for use in computer directed assembly and manufacture
- Patent Title (中): 用于计算机定向组装和制造的验证方法和系统
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Application No.: US13490393Application Date: 2012-06-06
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Publication No.: US09329594B2Publication Date: 2016-05-03
- Inventor: Balbir S. Rataul
- Applicant: Balbir S. Rataul
- Applicant Address: US CA Morgan Hill
- Assignee: Paramit Corporation
- Current Assignee: Paramit Corporation
- Current Assignee Address: US CA Morgan Hill
- Agency: Wiesner and Associates
- Agent Leland Wiesner
- Main IPC: G06F19/00
- IPC: G06F19/00 ; G05B19/418

Abstract:
Verification methods, systems, and computer program products verify the completion of assembly instructions used in light-manufacturing. Using position guides in a user interface, an in-use component is aligned and ready for verification through a first set of images of the in-use component. A visual highlight area on the user interface overlaying the in-use component indicates where to perform the assembly instructions. To create a traceable record, a second set of images are stored in an assembly record database when the assembler points a wand where the in-use component has been assembled. Another verification approach includes pointing an image capture device over the in-use component and receiving a first voice command authorizing image acquisition. A second voice command confirms accuracy of the image and proper assembly. Storing first and second voice commands and images of the in-use component being assembled in an assembly record database creates another traceable record useful for verification.
Public/Granted literature
- US20130144416A1 VERIFICATION METHODS AND SYSTEMS FOR USE IN COMPUTER DIRECTED ASSEMBLY AND MANUFACTURE Public/Granted day:2013-06-06
Information query