Invention Grant
- Patent Title: Semiconductor package and fabrication method thereof
- Patent Title (中): 半导体封装及其制造方法
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Application No.: US14309119Application Date: 2014-06-19
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Publication No.: US09343421B2Publication Date: 2016-05-17
- Inventor: Lung-Yuan Wang , Cheng-Chia Chiang , Chu-Chi Hsu , Chia-Kai Shih , Shu-Huei Huang
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW103101561A 20140116
- Main IPC: H01L33/00
- IPC: H01L33/00 ; H01L23/00 ; H01L21/56 ; H01L25/10 ; H01L25/00 ; H01L23/31 ; H01L23/498 ; H01L23/538

Abstract:
A method for fabricating a semiconductor package is provided, which includes the steps of: providing a first substrate having a plurality of first conductive posts on a surface thereof and providing a second substrate having a third surface having a chip disposed thereon and a fourth surface opposite to the third surface; disposing the first substrate on the third surface of the second substrate through the first conductive posts; forming an encapsulant between the first substrate and the second substrate, wherein the encapsulant has a first surface adjacent to the first substrate and a second surface opposite to the first surface; and removing the first substrate, thereby effectively preventing solder bridging from occurring.
Public/Granted literature
- US20150200169A1 SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF Public/Granted day:2015-07-16
Information query
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