Invention Grant
US09349635B2 Integrated circuits and methods of forming the same with multi-level electrical connection 有权
集成电路和与多级电气连接形成的方法

Integrated circuits and methods of forming the same with multi-level electrical connection
Abstract:
Integrated circuits and methods of forming integrated circuits are provided. A method of forming an integrated circuit includes providing a substrate that includes an electrical contact disposed therein. A first dielectric layer is formed over the substrate and electrical contact. A metal-containing layer is patterned over the first dielectric layer, with at least a first portion of the patterned metal-containing layer disposed over the first dielectric layer. The patterned metal-containing layer is absent in regions of the first dielectric layer over the electrical contact. A second dielectric layer is formed over the patterned metal-containing layer. A first via is etched in the first dielectric layer and the second dielectric layer over the electrical contact, and a second via is etched in the second dielectric layer over the patterned metal-containing layer. The first via and the second via are filled with an electrically-conductive material.
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