Invention Grant
- Patent Title: Buffer circuit for a LDO regulator
- Patent Title (中): LDO稳压器的缓冲电路
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Application No.: US14171538Application Date: 2014-02-03
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Publication No.: US09354649B2Publication Date: 2016-05-31
- Inventor: Ngai Yeung Ho , Liangguo Shen , Bing Liu , Vincenzo F Peluso
- Applicant: QUALCOMM Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM, Incorporated
- Current Assignee: QUALCOMM, Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Fountainhead Law Group P.C.
- Main IPC: G05F1/565
- IPC: G05F1/565 ; G05F3/30 ; G05F1/575 ; G05F1/56 ; G05F1/618 ; H03K19/0175

Abstract:
In one embodiment, a circuit includes a first transistor having a control terminal, a first terminal, and a second terminal where the first transistor is a first device type. The control terminal of the first transistor receives an input signal. The circuit also includes a second transistor having a control terminal, a first terminal, and a second terminal where the second transistor is a second device type. The control terminal of the second transistor is coupled to the second terminal of the first transistor. A voltage shift circuit has an input coupled to the first terminal of the first transistor and an output coupled to the first terminal of the second transistor and a voltage between the input of the voltage shift circuit and an output of the voltage shift circuit increases as a current from the output of the voltage shift circuit increases.
Public/Granted literature
- US20150220094A1 BUFFER CIRCUITS AND METHODS Public/Granted day:2015-08-06
Information query
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