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US09354850B2 Method and apparatus for instruction scheduling using software pipelining 有权
使用软件流水线进行指令调度的方法和装置

Method and apparatus for instruction scheduling using software pipelining
Abstract:
A method for scheduling loop processing of a reconfigurable processor includes generating a dependence graph of instructions for the loop processing; mapping a first register file of the reconfigurable processor on an arrow indicating inter-iteration dependence on the dependence graph; and searching for schedules of the instructions based on the mapping result.
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