Invention Grant
- Patent Title: Increasing macroscalar instruction level parallelism
- Patent Title (中): 增加宏指令级并行性
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Application No.: US13904660Application Date: 2013-05-29
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Publication No.: US09354891B2Publication Date: 2016-05-31
- Inventor: Jeffry E. Gonion
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Anthony M. Petro
- Main IPC: G06F15/00
- IPC: G06F15/00 ; G06F9/45 ; G06F9/38 ; G06F9/30

Abstract:
A processor may include a vector functional unit that supports concurrent operations on multiple data elements of a maximum element size. The functional unit may also support concurrent execution of multiple distinct vector program instructions, where the multiple vector instructions each operate on multiple data elements of less than the maximum element size.
Public/Granted literature
- US20140359253A1 INCREASING MACROSCALAR INSTRUCTION LEVEL PARALLELISM Public/Granted day:2014-12-04
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