Invention Grant
- Patent Title: Method of manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US13969542Application Date: 2013-08-17
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Publication No.: US09355869B2Publication Date: 2016-05-31
- Inventor: Michiaki Sugiyama , Nobuhiro Kinoshita
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Tokyo
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Tokyo
- Agency: Shapiro, Gabor and Rosenberger, PLLC
- Priority: JP2012-190993 20120831
- Main IPC: H01L21/50
- IPC: H01L21/50 ; H01L23/00 ; H01L23/31 ; H01L25/065 ; H01L25/00 ; H01L21/56 ; H01L23/498 ; H01L21/683 ; H01L23/528

Abstract:
In a semiconductor device formed by mounting a chip laminate including a semiconductor chip having a small diameter and a semiconductor chip having a large diameter over the top surface of a substrate, an excessive stress is prevented from being added to a joint of the two semiconductor chips. By mounting a first semiconductor chip having a large diameter over a support substrate and thereafter mounting a second semiconductor chip having a small diameter over the first semiconductor chip, it is possible to: suppress the inclination and unsteadiness of the second semiconductor chip mounted over the first semiconductor chip; and hence inhibit an excessive stress from being added to a joint of the first semiconductor chip and the second semiconductor chip.
Public/Granted literature
- US20140065767A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2014-03-06
Information query
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