Invention Grant
- Patent Title: Planar device on fin-based transistor architecture
- Patent Title (中): 基于鳍式晶体管架构的平面器件
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Application No.: US13995755Application Date: 2013-03-30
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Publication No.: US09356023B2Publication Date: 2016-05-31
- Inventor: Walid M. Hafez , Peter J. Vandervoorn , Chia-Hong Jan
- Applicant: INTEL CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: Finch & Maloney PLLC
- International Application: PCT/US2013/034729 WO 20130330
- International Announcement: WO2014/163603 WO 20141009
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L21/8234

Abstract:
Techniques are disclosed for forming a planar-like transistor device on a fin-based field-effect transistor (finFET) architecture during a finFET fabrication process flow. In some embodiments, the planar-like transistor can include, for example, a semiconductor layer which is grown to locally merge/bridge a plurality of adjacent fins of the finFET architecture and subsequently planarized to provide a high-quality planar surface on which the planar-like transistor can be formed. In some instances, the semiconductor merging layer can be a bridged-epi growth, for example, comprising epitaxial silicon. In some embodiments, such a planar-like device may assist, for example, with analog, high-voltage, wide-Z transistor fabrication. Also, provision of such a planar-like device during a finFET flow may allow for the formation of transistor devices, for example, exhibiting lower capacitance, wider Z, and/or fewer high electric field locations for improved high-voltage reliability, which may make such devices favorable for analog design, in some instances.
Public/Granted literature
- US20140291766A1 PLANAR DEVICE ON FIN-BASED TRANSISTOR ARCHITECTURE Public/Granted day:2014-10-02
Information query
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