发明授权
- 专利标题： Circuit and method for imprint reduction in FRAM memories
- 专利标题（中）： FRAM存储器中压印减少的电路和方法
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申请号： US14252551申请日： 2014-04-14
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公开(公告)号： US09361965B2公开(公告)日： 2016-06-07
- 发明人: Jose A. Rodriguez-Latorre , Hugh P. McAdams , Manish Goel
- 申请人： Texas Instruments Incorporated
- 申请人地址： US TX Dallas
- 专利权人： TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人： TEXAS INSTRUMENTS INCORPORATED
- 当前专利权人地址： US TX Dallas
- 代理商 Rose Alyssa Keagy; Frank D. Cimino
- 主分类号： G11C11/22
- IPC分类号： G11C11/22 ; G06F11/10 ; G11C29/52 ; H03M13/29 ; G11C29/04
摘要：
A method of operating a memory circuit (FIGS. 8A and 8B) is disclosed. The method includes writing true data (01) to a plurality of bits (B0, B1). A first data state (0) is written to a signal bit (Bi) indicating the true data. The true data is read and complementary data (10) is written to the plurality of bits. A second data state (1) is written to the signal bit indicating the complementary data.
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