Invention Grant
- Patent Title: Semiconductor device, manufacturing method thereof, and display device
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Application No.: US14974957Application Date: 2015-12-18
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Publication No.: US09362410B2Publication Date: 2016-06-07
- Inventor: Hiroshi Shibata , Shinji Maekawa
- Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Nixon Peabody LLP
- Agent Jeffrey L. Costellia
- Priority: JP2001-166877 20010601; JP2001-230701 20010731; JP2001-367575 20011130
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L29/786

Abstract:
A multi-gate structure is used and a width (d1) of a high concentration impurity region sandwiched by two channel forming regions in a channel length direction is set to be shorter than a width (d2) of low concentration impurity regions in the channel length direction. Thus, a resistance of the entire semiconductor layer of a TFT which is in an on state is reduced to increase an on current. In addition, a carrier life time due to photoexcitation produced in the high concentration impurity region can be shortened to reduce light sensitivity.
Public/Granted literature
- US20160099356A1 SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE Public/Granted day:2016-04-07
Information query
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