Invention Grant
US09367370B2 NOC loopback routing tables to reduce I/O loading and off-chip delays 有权
NOC环回路由表,以减少I / O加载和片外延迟

NOC loopback routing tables to reduce I/O loading and off-chip delays
Abstract:
Technologies are generally described to implement loopback simulation of inter-core messages in multicore processors. In some examples, a multicore processor may execute one or more processes, where each process communicates with other processes on or off the processor. Messages originating from processes on the multicore processor and destined for other processes on the multicore processor may be intercepted by a loopback simulator executing on the multicore processor. The loopback simulator may then redirect the intercepted messages to the destination processes on the multicore processor without the messages leaving the multicore processor.
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