Invention Grant
- Patent Title: System for detecting operating errors in integrated circuits
- Patent Title (中): 用于检测集成电路中的操作错误的系统
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Application No.: US12850056Application Date: 2010-08-04
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Publication No.: US09378077B2Publication Date: 2016-06-28
- Inventor: Francesco Pappalardo , Giuseppe Notarangelo , Elio Guidetti
- Applicant: Francesco Pappalardo , Giuseppe Notarangelo , Elio Guidetti
- Applicant Address: IT Agrate Brianza (MB)
- Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee: STMICROELECTRONICS S.R.L.
- Current Assignee Address: IT Agrate Brianza (MB)
- Agency: Allen, Dyer, Doppelt, Milbrath & Gilchrist, P.A.
- Priority: ITTO2009A0629 20090807
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/07 ; G06F11/16 ; H03K19/007

Abstract:
Errors induced by noise pulses in digital electronic circuits clocked with a clock signal are detected by providing at least one additional clock signal offset in time with respect to the clock signal by a given interval, and performing for at least one component of the circuit a comparison of correspondence between two versions of one and the same signal. The comparison is clocked by the additional clock signal and the absence of correspondence between the two versions of said signal identifies an error induced in the circuit by a noise pulse.
Public/Granted literature
- US20110060975A1 SYSTEM FOR DETECTING OPERATING ERRORS IN INTEGRATED CIRCUITS Public/Granted day:2011-03-10
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