Invention Grant
US09378323B1 Methods for retargeting vias and for fabricating semiconductor devices with retargeted vias
有权
用于重新定位通孔和用于制造具有重定向孔的半导体器件的方法
- Patent Title: Methods for retargeting vias and for fabricating semiconductor devices with retargeted vias
- Patent Title (中): 用于重新定位通孔和用于制造具有重定向孔的半导体器件的方法
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Application No.: US14563475Application Date: 2014-12-08
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Publication No.: US09378323B1Publication Date: 2016-06-28
- Inventor: Ayman Hamouda
- Applicant: GLOBALFOUNDRIES, Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee: GLOBALFOUNDRIES, INC.
- Current Assignee Address: KY Grand Cayman
- Agency: Ingrassia Fisher & Lorenz, P.C.
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G03F7/20 ; H01L21/768 ; H01L23/544
Abstract:
Methods for retargeting a via and for fabricating a semiconductor device with a retargeted via are provided. In one embodiment, a method for retargeting a via includes drawing a lower metal layer shape, drawing a via shape for overlying the lower metal layer shape, and drawing an upper metal layer shape for overlying the via shape to create an interconnection area between the via shape and the upper metal layer shape. The method includes determining a potential area loss of the interconnection area during integrated circuit fabrication processing. The method further includes enlarging the via shape to compensate for the potential area loss.
Public/Granted literature
- US20160162621A1 METHODS FOR RETARGETING VIAS AND FOR FABRICATING SEMICONDUCTOR DEVICES WITH RETARGETED VIAS Public/Granted day:2016-06-09
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