Invention Grant
- Patent Title: Methods of fabricating semiconductor devices including interlayer wiring structures
- Patent Title (中): 制造包括层间布线结构的半导体器件的方法
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Application No.: US14303142Application Date: 2014-06-12
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Publication No.: US09379118B2Publication Date: 2016-06-28
- Inventor: Je-Min Park
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel & Sibley, P.A.
- Priority: KR10-2013-0137676 20131113
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L27/108

Abstract:
Semiconductor devices and methods of fabricating the same are disclosed. The methods include forming a first interlayer insulating layer and a conductive contact plug that penetrates the first interlayer insulating layer, forming a second interlayer insulating layer and a first interlayer wiring on the first interlayer insulating layer. The first interlayer wiring penetrates the second interlayer insulating layer and overlaps the first metal contact plug. The second interlayer insulating layer is etched using the first interlayer wiring as a mask until the first metal contact plug is exposed, and an exposed portion of the conductive contact plug is etched using the first interlayer wiring as the mask.
Public/Granted literature
- US20150132945A1 Methods of Fabricating Semiconductor Devices Including Interlayer Wiring Structures Public/Granted day:2015-05-14
Information query
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