Invention Grant
- Patent Title: Circuitry and methods for common-mode rejection calibration
- Patent Title (中): 用于共模抑制校准的电路和方法
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Application No.: US14166370Application Date: 2014-01-28
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Publication No.: US09379676B2Publication Date: 2016-06-28
- Inventor: Michael S. Johnson , Russell Croman
- Applicant: Silicon Laboratories Inc.
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Egan, Peterman, Enders & Huston LLP
- Main IPC: H03F1/56
- IPC: H03F1/56 ; H03F1/02 ; H03F3/45

Abstract:
Circuitry and methods are disclosed that may employ common mode calibration circuitry configured to at least partially calibrate out impedance differences or mismatches between the differential signal paths of differential signal circuitry. The common mode calibration circuitry may be integrated as an internal part of integrated differential signal circuitry that includes a differential amplifier to reject common mode noise, and may be used to reduce or substantially eliminate any external and/or internal difference in signal path resistance that exists between the differential signal paths of the integrated differential signal circuitry. A common mode calibration signal may be internally or externally applied to the signal inputs of differential signal circuitry, and used to determine a setting for the common mode calibration circuitry that at least partially calibrates out impedance differences or mismatches between the differential signal paths of differential signal circuitry.
Public/Granted literature
- US20150214911A1 Circuitry And Methods For Common-Mode Rejection Calibration Public/Granted day:2015-07-30
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