- Patent Title: Methods and apparatus for synthesizing multi-port memory circuits
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Application No.: US14702971Application Date: 2015-05-04
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Publication No.: US09390212B2Publication Date: 2016-07-12
- Inventor: Sundar Iyer , Shang-Tse Chuang , Thu Nguyen , Sanjeev Joshi , Adam Kablanian
- Applicant: Cisco Technology, Inc.
- Applicant Address: US CA San Jose
- Assignee: Cisco Technology, Inc.
- Current Assignee: Cisco Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Edell, Shapiro & Finnan, LLC
- Main IPC: G11C11/00
- IPC: G11C11/00 ; G06F17/50 ; G11C11/419

Abstract:
Multi-port memory circuits are often required within modern digital integrated circuits to store data. Multi-port memory circuits allow multiple memory users to access the same memory cell simultaneously. Multi-port memory circuits are generally custom-designed in order to obtain the best performance or synthesized with logic synthesis tools for quick design. However, these two options for creating multi-port memory give integrated circuit designers a stark choice: invest a large amount of time and money to custom design an efficient multi-port memory system or allow logic synthesis tools to inefficiently create multi-port memory. An intermediate solution is disclosed that allows an efficient multi-port memory array to be created largely using standard circuit cell components and register transfer level hardware design language code.
Public/Granted literature
- US20150234950A1 Methods and Apparatus for Synthesizing Multi-Port Memory Circuits Public/Granted day:2015-08-20
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